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TSMC Plans More Chip Capacity as It Checks U.S. Power Supplies

The chipmaker set factory production targets while checking whether U.S. data-center construction and electricity supplies support customers’ plans.

TSMC Fab 18 at Southern Taiwan Science Park, photographed in May 2025.
TSMC’s Fab 18 at Southern Taiwan Science Park in May 2025. The company announced further chip-factory production plans in October 2026.4300streetcar / Wikimedia Commons · CC BY 4.0

Taiwan Semiconductor Manufacturing Company is expanding chip capacity while checking U.S. data-center construction and power supplies. On its October 15 earnings call, chairman and chief executive C.C. Wei said company teams had found cloud providers well prepared.

TSMC makes chips designed by other companies, including processors used in computers and phones. Its company profile records 12,682 products manufactured for 534 customers in 2025, using 305 manufacturing technologies. Those customers serve different markets, from cars and consumer electronics to high-performance computing. Building enough capacity requires forecasts across those businesses before factories begin production.

Wei said planning includes customers and their customers. TSMC’s teams check U.S. construction progress and electricity supplies; he did not name sites, give visit counts or publish site-level findings.

Names such as two-nanometer and three-nanometer identify manufacturing generations, rather than one exact dimension inside a chip. Announced production targets include Arizona’s second factory in the third quarter of 2027, a new Tainan Science Park three-nanometer factory in the first half of 2027, another in the first half of 2028 and Japan’s second factory in 2028. Wei expects annual capacity for N2, TSMC’s two-nanometer manufacturing family, to more than double in 2027.

Sales are shifting toward computing and newer chips

The expansion follows a sharp rise in sales. TSMC reported third-quarter revenue of $46.72 billion, up from $40.20 billion in the previous quarter. In New Taiwan dollars, sales reached NT$1,494.24 billion and net income reached NT$763.06 billion. Net income rose 68.7% from a year earlier. The quarter ended September 30.

Reported results and fourth-quarter forecast

MeasureQ3 2026 actualQ4 2026 forecast
Revenue, U.S. dollars$46.72 billion$52.3 billion to $54.3 billion
Gross margin66.4%65% to 67%
Operating margin58.7%56.5% to 58.5%

Reported results for July through September and management’s forecast for October through December.

Revenue grew 50.9% from a year earlier in New Taiwan dollars and 41.2% in U.S. dollars. From April–June to July–September, the increases were 17.6% and 16.2%, respectively. Currency changes affect the reported growth rate when sales are translated into another currency.

In July’s forecast, TSMC had expected third-quarter U.S.-dollar revenue of $44.6 billion to $45.8 billion. The reported $46.72 billion exceeded the top of that range by $920 million, or about 2.0%, calculated from the published figures. Third-quarter gross margin of 66.4% remained within the July forecast of 65% to 67%, while operating margin of 58.7% exceeded the earlier upper bound of 58%.

TSMC’s management report shows high-performance computing supplied 68% of third-quarter revenue, against 57% a year earlier. Smartphones contributed 21%. Together those categories supplied 89% of sales, calculated from the reported shares. High-performance computing includes products beyond AI accelerators, so the report does not give an AI-only share.

Two-nanometer chips supplied 8% of third-quarter wafer revenue. Three-nanometer supplied 33%, five-nanometer 28% and seven-nanometer 10%. Together these processes supplied 79% of wafer revenue. Wafer revenue counts chip manufacturing sales, while the computing and smartphone percentages use total company revenue, including other services.

TSMC’s technology descriptions show how its manufacturing generations overlap. Three-nanometer technology entered high-volume production in 2022, five-nanometer in 2020 and seven-nanometer in 2018. Customers continue to buy chips made with those processes while newer generations grow. In the second quarter of 2026, three-nanometer chips supplied 30% of wafer revenue and five-nanometer supplied 33%, according to July’s release. By the third quarter, their positions had reversed: three-nanometer supplied 33% and five-nanometer 28%.

July’s release put two-nanometer chips at 3% of second-quarter wafer revenue, compared with 8% in the third quarter. All processes at seven nanometers and below supplied 77% in the second quarter and 79% in the third. The two-nanometer share rose by five percentage points while the combined group rose by two.

Manufacturing capacity is measured in wafers, the disks on which many chips are produced. TSMC says facilities it manages with its subsidiaries had annual capacity exceeding 17 million twelve-inch-equivalent wafers in 2025. The equivalent measure puts different wafer sizes on a common basis. Its network includes plants in Taiwan, Arizona, Nanjing and Japan, as well as smaller-wafer facilities in Washington state and China.

TSMC’s existing network also includes a different expansion in Germany. Its company profile says construction began in Dresden in 2024 for a specialty factory using 28/22-nanometer and 16/12-nanometer technologies. That project serves older manufacturing generations than the two- and three-nanometer processes discussed on the October call.

Factory spending runs ahead of production

TSMC reaffirmed its $60 billion to $64 billion worldwide capital budget for 2026.

The company has spent $40.64 billion on factory assets and equipment this year, including $13.84 billion in the third quarter. Reaching the annual budget would require $19.36 billion to $23.36 billion in the final quarter, more than any earlier quarter this year. SnowRock calculated the range by subtracting reported spending through September from both ends of the annual budget.

TSMC generated NT$919.77 billion in operating cash during the third quarter and spent NT$443.21 billion on factory assets and equipment, leaving NT$476.56 billion in free cash flow. Operating cash was about 2.1 times capital spending. Both calculations use the consolidated cash-flow statement, which records receipts and spending across TSMC’s businesses.

TSMC’s presentation forecasts fourth-quarter revenue of $52.3 billion to $54.3 billion. The $53.3 billion midpoint would be about 14.1% above third-quarter sales. Its gross-margin forecast is 65% to 67%. Gross margin measures sales remaining after production costs, before operating expenses and other items. Third-quarter gross margin was 66.4%, down from 67.7% in the second quarter; operating margin fell to 58.7% from 60.3%.

Finance chief Wendell Huang attributed the third-quarter gross-margin decline primarily to initial two-nanometer production. For the fourth quarter, he expects continued two-nanometer expansion and overseas factories to reduce margins, partly offset by productivity and cost improvements.

Beyond the current expansion, TSMC and equipment supplier ASML have set another manufacturing timetable. Their September announcement says TSMC intends to use ASML’s High NA extreme-ultraviolet lithography technology in high-volume manufacturing from 2030. Lithography equipment prints chip patterns onto wafers. The companies plan to increase the size of photomasks, which carry those patterns, from six inches to twelve inches.

The joint initiative targets a twelve-inch-mask pilot line by 2031 and production-ready systems using those larger masks by 2033. The companies expect larger masks to improve productivity, lower chipmaking costs and remove constraints that require adjoining patterns to be joined together. Those are stated goals for future equipment. Their first High NA production plans use existing six-inch masks, so the later mask project is a separate step in the manufacturing schedule.

Chip efficiency and electricity supply follow different plans

For A14, a process scheduled for 2028, TSMC’s customer newsletter advertises a 10% to 15% speed improvement at the same power as N2, or a 25% to 30% power reduction at the same speed. These manufacturer comparisons describe alternative chip designs. A customer can pursue faster computation or reduced power use, depending on the design.

TSMC identifies N2, N2P and A16 as members of its two-nanometer family. A16 adds a power-delivery structure designed for high-performance computing products with complex signal routes. A14 is a later manufacturing generation intended to improve performance and energy efficiency. These development plans address how chips use power, while the U.S. site checks concern whether customers can obtain electricity where they plan to install computing equipment.

In its October electricity outlook, the U.S. Energy Information Administration forecasts commercial-sector demand will rise 2.8% in 2027 and industrial demand 2.7%. Data centers fall within the commercial category. The agency also estimated third-quarter national electricity consumption rose 4% from a year earlier, with residential use up 6% and commercial use up 5%. A hot summer increased cooling demand.

TSMC’s financial calendar lists November 10 for its October sales report, the first monthly revenue update after these forecasts.

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