DeepSeek’s Huawei Software Push Targets a Costly Part of Switching AI Chips

DeepSeek’s collaboration with Huawei gives AI developers a concrete way to move some programs onto Chinese processors: keep familiar programming interfaces, then replace the software underneath them. Public code shows how far that approach extends, including a revealing limit on the firmware used to produce published performance figures. DeepGEMM documentation, DeepEP documentation

The development dates to September 30, when DeepSeek announced programming tools for Huawei’s Ascend chips, according to Reuters. The documented releases concern software used to calculate model outputs and move information between processors. They do not announce a newly designed joint chip. Reuters

That distinction directs attention toward a practical question for companies buying AI computing: how much of an existing application can engineers keep when they change hardware? The repositories offer a more precise answer than a claim that one chip has become a substitute for another.

DeepSeek has released an Ascend version of DeepGEMM, a library for matrix multiplication, the repeated arithmetic at the heart of many neural-network operations. It uses the same public programming interfaces as the original library. Developers can retain familiar function calls while an implementation tuned for Ascend performs the calculations. DeepGEMM documentation

That removes one kind of rewriting, but some data must still be prepared differently. The documentation describes a Huawei-specific arrangement for numbers used to scale low-precision calculations. It packs those scaling values differently from the Nvidia version. Matching function names therefore does not guarantee that every underlying array can be copied unchanged.

One model can need many communicating processors

A separate library, DeepEP-Ascend, addresses communication. It sends information to selected parts of a mixture-of-experts model and combines their answers. Such a model assigns different calculations to different groups of parameters, often spread across processors. Routing those requests and returning results becomes part of the time needed to answer a user. DeepEP documentation

DeepSeek’s older V3 technical report illustrates the design. It describes 671 billion parameters, the learned numerical values inside a model, with 37 billion activated for each token. Tokens are pieces of text. The active portion is about 5.5 percent, calculated by dividing 37 by 671. DeepSeek-V3 report

That percentage describes selected calculations, not a promise that the model needs only 5.5 percent of its storage. The full set of learned values must remain accessible across the system. Selective calculation creates a reason to improve communication as well as arithmetic, because different text can select different experts.

Huawei and SiliconFlow researchers made that problem explicit in a June 2025 paper about CloudMatrix384, a system using an earlier generation of Ascend processors. Pengfei Zuo and colleagues described how uneven expert selection, varying input lengths and bursts of user requests complicate model serving. Their account treats scheduling, memory and networking as connected engineering problems. CloudMatrix research

Their serving architecture separates reading a prompt, generating output and storing reusable attention information into independently scalable pools. The paper describes software designed around a particular interconnection system. It is a published engineering account by the companies involved, rather than an independent test of today’s Ascend 950 software.

A benchmark includes its firmware

DeepEP-Ascend’s published communication measurements use Ascend 950DT processors and a manually configured hardware-development kit supplied to DeepSeek. Its documentation says that configuration was not a publicly distributed release. The figures therefore establish what the authors measured with that setup; another operator needs compatible firmware to reproduce them. DeepEP documentation

The README points to a planned commercial release for mid-October, around October 15, and says timing depends on Huawei. SnowRock could not independently establish whether that release was publicly available at this article’s reporting cutoff. A planned date alone cannot resolve whether an outside customer can obtain the configuration.

A company comparing systems would need to separate two questions: whether its engineers can get and run the software, and whether its own workload achieves acceptable speed and accuracy. A published code repository helps with inspection. It cannot supply access to a hardware configuration that an evaluator does not have.

DeepGEMM reports tests of selected matrix operations on Ascend 950DT using Huawei’s CANN toolkit. A complete chatbot also has to schedule requests, communicate and generate answers, so its output rate measures a different task. DeepGEMM documentation

TileLang shares a language, then specializes the machine code

The third piece is TileLang’s Ascend 950 backend, which translates programs into instructions for Huawei hardware. Its documentation says it reuses a shared front end, where programmers express calculations, while specializing later compilation steps for Ascend. It can be built with CUDA disabled, without requiring Nvidia’s toolkit. TileLang documentation

An included example combines matrix multiplication with an operation that replaces negative values with zero. The compiler coordinates Ascend’s matrix and vector cores and moves intermediate results through their different memories. Combining operations in this way can avoid launching a second kernel, a small program that runs on the accelerator.

This is a specific form of portability: programmers can work within a shared language while hardware-specific software manages execution. It does not mean chips share the same internal design. The compiler still needs to understand which units perform each operation, where values reside and when one calculation must wait for another.

Ascend support also has a history preceding this announcement. A separate TileLang-Ascend project records its open-source release in September 2025 and work on earlier A2 and A3 hardware. The newer Ascend 950 backend should be assessed as an extension of that broader effort, with its own supported equipment and dependencies. Earlier Ascend project

For developers, keeping these versions distinct matters when seeking help or reproducing a result. Instructions for an earlier processor can lead to a different compiler path. A shared project name can conceal the hardware generation, package versions and code revision needed to reproduce a particular experiment.

MLPerf’s benchmarking rules offer a useful outside reference. They distinguish purchasable systems from previews and experimental systems, and they require accuracy checks as part of a performance submission. That framework gives evaluators a way to state both availability and measured capability without treating them as the same thing. MLPerf guide

The next evidence to watch is unusually concrete: a public, identifiable firmware release; instructions another team can follow; and complete application tests with disclosed hardware and software. DeepSeek’s repositories already identify several of those dependencies. Reproducible results on a customer-obtainable configuration would show how much of this software transfer can reach ordinary deployment.